1. Field of the Invention
The present invention relates to a liquid crystal display (LCD) device. More particularly, the present invention relates to an array substrate for an in-plane switching mode (IPS-mode) LCD device that prevents wavy noise and a method of fabricating the same.
2. Discussion of the Related Art
A related art liquid crystal display (LCD) device uses optical anisotropy and polarization properties of liquid crystal molecules. The liquid crystal molecules have a definite alignment direction as a result of their thin and long shapes. The alignment direction of the liquid crystal molecules can be controlled by applying an electric field across the liquid crystal molecules. In other words, as the intensity or direction of the electric field is changed, the alignment of the liquid crystal molecules also changes. Since incident light is refracted based on the orientation of the liquid crystal molecules due to the optical anisotropy of the liquid crystal molecules, images can be displayed by controlling light transmissivity.
Recently, since the LCD device including a thin film transistor (TFT) as a switching element, referred to as an active matrix LCD (AM-LCD) device, has excellent characteristics of high resolution and displaying moving images, the AM-LCD device has been widely used.
The AM-LCD device includes an array substrate, a color filter substrate and a liquid crystal layer interposed therebetween. The array substrate may include a pixel electrode and the TFT, and the color filter substrate may include a color filter layer and a common electrode. The AM-LCD device is driven by an electric field between the pixel electrode and the common electrode. However, since the AM-LCD device uses a vertical electric field, the AM-LCD device has a bad viewing angle.
An IPS-mode LCD device may be used to resolve the above-mentioned problem. FIG. 1 is a cross-sectional view of a related art IPS-mode LCD device. As shown in FIG. 1, the array substrate and the color filter substrate are separated and face each other. The array substrate includes a first substrate 10, a common electrode 17 and a pixel electrode 30. Though not shown, the array substrate may include a TFT, a gate line and a data line. The color filter substrate includes a second substrate 9, a color filter layer (not shown), and so on. A liquid crystal layer 11 is interposed between the first substrate 10 and the second substrate 9. Since the common electrode 17 and the pixel electrode 30 are formed on the first substrate 10 on a same level, a horizontal electric field “L” between the common and pixel electrodes 17 and 30 is formed.
FIGS. 2A and 2B are cross-sectional views showing turned on/off conditions of the related art IPS-mode LCD device. As shown in FIG. 2A, when the voltage is applied to the IPS-mode LCD device, liquid crystal molecules 11a above the common electrode 17 and the pixel electrode 30 are unchanged. But, liquid crystal molecules 11b between the common electrode 17 and the pixel electrode 30 are horizontally arranged due to the horizontal electric field “L”. Since the liquid crystal molecules are arranged by a horizontal electric field, the IPS-mode LCD device has a characteristic of a wide viewing angle. FIG. 2B shows a condition when the voltage is not applied to the IPS-mode LCD device. Because a electric field is not formed between the common and pixel electrodes 17 and 30, the arrangement of liquid crystal molecules 11 is not changed.
FIG. 3 is a plan view of an array substrate of the IPS-mode LCD device according to the related art. As shown in FIG. 3, the array substrate includes a substrate (not shown), a gate line 43, a data line 60, and a common line 47. The gate line 43 is formed along a first direction of the substrate on the substrate. The data line 60 crosses the gate line 43 such that the gate and data lines 43 and 60 define a pixel region “P” on the substrate. The common line 47 is parallel to the gate line 43. The common line 47 also crosses the data line 60.
A TFT “Tr”, a switching element, is formed at a crossing portion of the gate and data lines 43 and 60. The TFT “Tr” includes a gate electrode 45, a semiconductor layer 51, and source and drain electrodes 53 and 55. The gate electrode 45 extends from the gate line 43 into the pixel region “P”. The source electrode 53 extends from the data line 60, and the source and drain electrodes 53 and 55 are separated from each other on the semiconductor layer 51. Moreover, a plurality of pixel electrodes 70 and a plurality of common electrodes 49 are formed on the substrate in the pixel region “P”. The plurality of pixel electrodes 70 extend from a pixel connection line 68, which contacts the drain electrode 55 through a drain contact hole 66. The plurality of common electrodes 49 extend from the common line 47 and are alternately arranged with the plurality of pixel electrodes 70. Ends of each pixel electrode are connected to each other such that the connected portion is defined as a second storage electrode 69. The second storage electrode 69 overlaps the common line 47, and a portion of the common line 47 overlapped with the second storage electrode 69 is defined as a first storage electrode 48. The first electrode 69 and second storage electrode 48 compose a storage capacitor StgC.
FIG. 4 is cross-sectional view of a portion taken along the line IV-IV of FIG. 3. As shown in FIG. 4, the array substrate for the IPS-mode LCD device according to the related art includes the substrate 40, the gate electrode 45, the semiconductor layer 51, the source and drain electrodes 53 and 55, the plurality of pixel electrodes 70, and the plurality of common electrodes 49. The array substrate is fabricated through the following steps. The gate line 43 (of FIG. 3), the gate electrode 45, the common line 47 (of FIG. 3) and the plurality of common electrodes 49 are formed on the substrate 40 by depositing and patterning a first metal material through a first mask process. Next, a gate insulating layer 50 is formed on the substrate 40 including the gate line 43 (of FIG. 3), the gate electrode 45, the common line 47 (of FIG. 3) and the plurality of common electrodes 49. Then, the semiconductor layer 51, which includes an intrinsic amorphous silicon layer 51a and an impurity-doped amorphous silicon layer 51b, is formed on the gate insulating layer 50 by depositing and patterning intrinsic amorphous silicon and impurity-doped amorphous silicon through a second mask process.
And the data line 60 (of FIG. 3), the source electrode 53 and the drain electrode 55 are formed on the semiconductor layer 51 and the gate insulating layer 50 by depositing and patterning a second metal material through a third mask process. As mentioned above, the source electrode 53 extends from the data line 60, and the source and drain electrodes 53 and 55 are separated from each other.
Next, a passivation layer 63 including a drain contact hole 66 is formed on the source and drain electrodes 53 and 55 and the gate insulating layer 50 by depositing and patterning an insulating material through a fourth mask process. As mentioned above, the drain contact hole 66 exposes the drain electrode 55.
Finally, the pixel connection line 68 and the plurality of pixel electrodes 70 are formed on the passivation layer 63 by depositing and patterning a transparent conductive material through a fifth mask process. The pixel connection line 68 contacts the drain electrode 55 through the drain contact hole 66 such that the plurality of pixel electrodes 70 are electrically connected to the drain electrode 55. The plurality of pixel electrodes 70 are alternately arranged with the plurality of common electrodes 49.
As discussed above, the array substrate for the IPS-mode LCD device according to the related art is fabricated through five mask processes. Accordingly, a processing time, an error rate and production costs are increased, and a production yield is decreased.
To resolve these problems, a fabricating process using four mask processes is suggested. However, since the source and drain electrodes do not cover both ends of the semiconductor layer, a problem, referred to as wavy noise, is caused. The wavy noise means that when the IPS-mode LCD device is turned on or off, a wave pattern appears on a liquid crystal panel.